Sorry if it seems like I've been stalled on internal controllor development lately. I've been working on the problem of networking basic stamps.

Stop laughing. It's harder than you think it is. First of all, they don't have much RAM. Second of all, they don't have much ROM. Truly challenging is writing multitasking source code that fits in 4K and uses 256 bytes of RAM. Maybe it's old hat to some of you - to me, it's very new.

But, not impossible. I have come up with what I think is a working scenereo.

The CD4031BF3A is a 64 bit FIFO, or serial register. 8 bytes.

Each module will be equipped with one of these, to be used as a synchronous buffer.

The master network control module will indicate that it is requesting input by raising the attention line to the module in question. The module in question will respond by raising the data line